About DVCon Europe 2017
The Design and Verification Conference (DVCon) Europe is the leading European event covering the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. Sponsored by Accellera Systems Initiative™, DVCon Europe brings chip architects, design and verification engineers, and IP integrators the latest methodologies, techniques, applications and demonstrations for the practical use of EDA solutions for electronic design. One of three DVCon events around the globe, DVCon Europe 2017 will include 2 keynote speeches, panel sessions, a broad range of papers and posters, 16 tutorials and an exhibition with demonstrations from leading tool, IP and service providers. It will be held at the Holiday Inn Munich City Center, Munich, Germany on the 16th and 17th of October, 2017. For more details and registration, visit www.dvcon-europe.org. Follow DVCon Europe on #dvconeurope.
In order to boost the interest, usage and development of electronic design automation (EDA) and intellectual property (IP) standards in Europe, this highly technical conference is organized to invite industry experts to learn and share best practices on:
- The application of system-level design and verification languages such as SystemC, SystemVerilog or e
- The use of SystemVerilog Assertions (SVA) or the Property Specification Language (PSL)
- Verification methodologies based on the Universal Verification Methodology (UVM)
- IP reuse, automation and integration standards based on IP-XACT
- Low power design and verification using the Unified Power Format (UPF)
General topic areas on Electronic System Level (ESL), Verification & Validation, Analog/Mixed-Signal, IP reuse, Design Automation, and Low Power design and verification, will be highlighted in tutorials, papers, and poster sessions.
With a highly technical focus on System and IC design, verification, and integration, DVCon Europe is a very practical and industry-focused conference on EDA standards and standardization.
Conference attendees are primarily designers of electronic systems, ASICs and FPGAs, as well as those involved in the research, development and application of EDA tools and IP integration.
Gain insight from users on standards and languages
DVCon Europe 2017 selects the best user experiences, high quality papers and presentations around best practices on the application of standardized languages, tools, and methodologies for design and verification such as SystemC, SystemVerilog, PSL, UVM, IP-XACT and many more.
Learn from the experts
DVCon Europe 2017 organizes technical workshops and tutorials on emerging EDA and IP standards, with highly educational content. Experts in the industry share on topics like UVM, SystemC and IP-XACT, with the fundamental concepts and practical usage of these standards explained, including examples and demonstrations.
Connect to standardization developments
DVCon Europe 2017 is hosted by Accellera Systems Initiative, the recognized organization with the mission to develop and deploy EDA and IP standards. Experts are available to discuss standards development and user needs.
Network with peers
DVCon Europe 2017 is the place to meet experts from various industries and connect with peers to discuss the latest practices and trends in design and verification. Join us at networking events to interact with colleagues, share techniques and learn how other users tackle the challenges.
Find out the latest EDA and IP vendor offerings
DVCon Europe 2017 hosts a compact exhibition where the industry can meet to discuss EDA and IP tool and service solutions. Visit the exhibition for demonstrations, interactive discussions, and top vendor offerings.